发明名称 ELECTRONIC PACKAGES WITH PRE-DEFINED VIA PATTERNS AND METHODS OF MAKING AND USING THE SAME
摘要 An electronic package is provided. The electronic package includes a substrate and a plurality of vias defined by a corresponding plurality of pre-defined via patterns. The electronic package further a metal built-up layer disposed on portions of the substrate to provide a plurality of pre-defined via locations and the plurality of pre-defined via patterns of the plurality of vias. Also, the electronic package includes a first conductive layer disposed on at least a portion of the metal built-up layer. Moreover, the electronic package includes a second conductive layer disposed on the first conductive layer, where the plurality of vias is disposed at least in part in the metal built-up layer, the first conductive layer, and the second conductive layer.
申请公布号 US2016183376(A1) 申请公布日期 2016.06.23
申请号 US201414580269 申请日期 2014.12.23
申请人 General Electric Company 发明人 Gowda Arun Virupaksha;McConnelee Paul Alan;Tuominen Risto Ilkka
分类号 H05K1/18;H05K3/30;H05K3/00;H05K1/09;H05K1/11 主分类号 H05K1/18
代理机构 代理人
主权项 1. An electronic package, comprising: a substrate; a plurality of vias defined by a corresponding plurality of pre-defined via patterns; a metal built-up layer disposed on portions of the substrate to provide a plurality of pre-defined via locations and the plurality of pre-defined via patterns of the plurality of vias; a first conductive layer disposed on at least a portion of the metal built-up layer; and a second conductive layer disposed on the first conductive layer, wherein the plurality of vias is disposed at least in part in the metal built-up layer, the first conductive layer, and the second conductive layer.
地址 Schenectady NY US
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