发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT, CLOCK SIGNAL CONTROL METHOD, AND PROGRAM
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit that can execute processing while stopping the supply of a clock signal to reduce power consumption.SOLUTION: A semiconductor integrated circuit 1 outputs a clock signal on the basis of an enable signal and a reset control signal that control the supply of a clock signal, sets the counter value of a counter circuit 9 on the basis of the outputted clock signal, and outputs a clock signal generated by a clock signal generation module 3 to counter circuits 9, 10 when the enable signal indicates the continuance of clock signal supply. When the enable signal indicates the stoppage of clock signal supply and the reset control signal indicates the execution of a reset, the semiconductor integrated circuit 1 outputs an initialization clock signal that is a combination of a low-level signal differing from the clock signal generated by the clock signal generation module 3 and the clock signal to the counter circuits 9, 10.SELECTED DRAWING: Figure 1
申请公布号 JP2016197283(A) 申请公布日期 2016.11.24
申请号 JP20150075864 申请日期 2015.04.02
申请人 CANON INC 发明人 INTO JUNICHI
分类号 G06F1/04;G06F1/32 主分类号 G06F1/04
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