MULTIPLE COMPUTE NODES

摘要

An example apparatus comprises a first compute node including a first processor; a second compute node including a second processor; an input/manta (I/O) interface to selectively couple the first and second compute nodes to a set of I/O resources; and a voltage regulator including a set of power phase circuits, the voltage regulator to operate in a fault tolerant mode to provide power from selected ones of a first portion of the set of power phase circuits to the first compute node and to provide power from selected ones of a second portion of the set of power phase circuits to the second compute node.

主权项

1. An apparatus, comprising:
a first compute node including a first processor; a second compute node including a second processor; an input/output (I/O) interface to selectively couple the first compute node and the second compute node to at least one I/O resource; a voltage regulator including a plurality of power phase circuits to selectively provide power to the first compute node and the second compute node; and a controller to:
receive signals indicative of an operating status of the first and second compute nodes, andcontrol the I/O interface and the voltage regulator to decouple the at least one I/O resource from, and cutoff power to, respectively, one of the first and second compute nodes based on the received operating status signals.