| 摘要 |
A method for forming a landing plug contact hole of a semiconductor device is provided to reduce resistance and to decrease a harmful influence on a transistor due to an excessive ion implantation on a landing plug contact using two-step etching processes. A gate pattern with a sidewall spacer is formed on an active region of a semiconductor substrate(10). An interlayer dielectric(20) is formed on the resultant structure. A first landing plug contact hole is formed on the resultant structure by etching selectively the interlayer dielectric using the gate pattern as an etch barrier and a contact mask as an etch mask. A first landing plug is partially filled in the first landing plug contact hole. A spacer(26) is formed by performing an etch-back process on the first landing plug. A second landing plug contact hole is formed on the active region of the substrate by performing an etching process using the spacer as an etch barrier. The landing plug contact hole is filled with a second landing plug(30).
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