| 发明名称 |
CONTROLLING DISPLACEMENT IN A CO-OPERATIVE AND ADAPTIVE MULTIPLE-LEVEL MEMORY SYSTEM |
| 摘要 |
In one embodiment, a processor includes a control logic to determine whether to enable an incoming data block associated with a first priority to displace, in a cache memory coupled to the processor, a candidate victim data block associated with a second priority and stored in the cache memory, based at least in part on the first and second priorities, a first access history associated with the incoming data block and a second access history associated with the candidate victim data block. Other embodiments are described and claimed. |
| 申请公布号 |
US2016321185(A1) |
申请公布日期 |
2016.11.03 |
| 申请号 |
US201514697832 |
申请日期 |
2015.04.28 |
| 申请人 |
Intel Corporation |
发明人 |
Doshi Kshitij A.;Hughes Christopher J. |
| 分类号 |
G06F12/08;G06F3/06 |
主分类号 |
G06F12/08 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A processor comprising:
a control logic to determine whether to enable an incoming data block associated with a first priority to displace, in a cache memory coupled to the processor, a candidate victim data block associated with a second priority and stored in the cache memory, based at least in part on the first and second priorities, a first access history associated with the incoming data block and a second access history associated with the candidate victim data block. |
| 地址 |
Santa Clara CA US |
