发明名称 MEMORY DEVICE AND MEMORY SYSTEM
摘要 Provided is a memory device having a structure suitable for higher integration while ensuring ease of manufacture. The memory device is provided with n memory cell units which are layered on a substrate successively from a first memory cell unit to an n-th memory cell unit in a first direction. Each of the n memory cell units includes: one or more first electrodes; a plurality of second electrodes each of which is disposed so as to intersect the first electrode; a plurality of memory cells which are disposed at points of intersection of the first electrode and each of the plurality of second electrodes, and which are respectively connected to both the first electrode and the second electrodes; and one or more lead-out wires connected to the first electrode and forming one or more connection portions. At least one connection portion in a (m + 1)-th memory cell unit is positioned so as to overlap, in a first direction, an m-th memory cell region surrounded by a plurality of memory cells in the m-th memory cell unit.
申请公布号 WO2016199556(A1) 申请公布日期 2016.12.15
申请号 WO2016JP64772 申请日期 2016.05.18
申请人 SONY SEMICONDUCTOR SOLUTIONS CORPORATION 发明人 TERADA, Haruhiko
分类号 H01L27/105;H01L27/10;H01L45/00;H01L49/00 主分类号 H01L27/105
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