发明名称 STACKED WAFER FOR 3D INTEGRATION
摘要 A method of forming a stacked wafer device comprising the steps of : providing a first wafer; forming a plurality of copper pads in a first surface of the first wafer; forming at least one embedded vertical connector in the first wafer in isolation from the copper pads of the first wafer; providing a second wafer; forming a plurality of copper pads in a first surface of the second wafer, the placement of the copper pads to coincide with the location of the copper pads of the first wafer; forming at least one embedded vertical connector in the second wafer in isolation from the copper pads of the second wafer; bringing the first surfaces of the wafers into contact, so as to contact the copper pads; applying a force to the wafers at a pre-determined pressure and at a pre-determined temperature until the copper pads are bonded, and so forming the stacked wafer device from the bonded first and second wafer.
申请公布号 SG134187(A1) 申请公布日期 2007.08.29
申请号 SG20060003305 申请日期 2006.01.13
申请人 TEZZARON SEMICONDUCTOR (S) PTE LTD 发明人 SANGKI HONG;CHOCKALINGAM RAMASAMY;SUBHASH GUPTA
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