发明名称 情報処理装置、情報処理装置の制御方法および情報処理装置の制御プログラム
摘要 An information processing device includes a plurality of arithmetic processing devices, a plurality of storage devices, a connection section that connects a first arithmetic processing device to a first storage device and a second storage device which are duplexed and a control section that causes, when the performance of the second storage device is reduced, the connection section to cut out the second storage device whose performance has been reduced from the first arithmetic processing device and the first storage device, causes to duplex a third storage device with the first storage device, causes the connection section to connect the first storage device and the third storage device which have been duplexed to the first arithmetic processing device and to connect a second arithmetic processing device to the second storage device that has been cut out, and causes the second arithmetic processing device to initialize the second storage device.
申请公布号 JP5949408(B2) 申请公布日期 2016.07.06
申请号 JP20120220445 申请日期 2012.10.02
申请人 富士通株式会社 发明人 小野 貴継
分类号 G06F3/06;G06F3/08;G06F13/00 主分类号 G06F3/06
代理机构 代理人
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