HERMETICALLY SEALED INTEGRATED CIRCUIT PACKAGE

摘要

A device substrate (2) has a device major surface (6), a semiconductor element (4) on the device major surface (6), and electrically conductive device connectors (16) extending across the device major surface (4). An interconnection substrate has an interconnection substrate (20) having an interconnection major surface (21 ), the interconnection substrate (20) defining at least one sealing recess (24) recessed from the interconnection major surface (21 ) , the sealing recess (24) being surrounded by a sealing ring (22). The device substrate (2) is mounted on the interconnection substrate (20) with the interconnection major surface (21 ) facing the device major surface (6), the sealing ring (22) around the semiconductor element (4) and with the device major surface (6) sealed against the sealing ring (22) so that the recess (24) forms a sealed cavity containing the semiconductor element (4). Electrical interconnects (30) extend across the interconnection major surface (21 ). Interconnection bumps (28) are provided outside the sealing ring (22) to electrically connect the device (2) to the interconnect substrate (20).