发明名称 SiC EPITAXIAL WAFER AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a manufacturing method of an SiC epitaxial wafer with low BPD and stacking fault density and an epitaxial layer of low step bunching.SOLUTION: The manufacturing method of the SiC epitaxial wafer includes the steps of: forming a first SiC epitaxial layer by setting a temperature of a substrate to 1570°C or higher and 1610°C or lower, and simultaneously supplying SiHgas and CHgas with a concentration ratio C/Si of 0.7 to 1.2 and supplying dopant gas, by using hydrogen gas as a carrier gas; supplying only the hydrogen gas for two minutes or longer while maintaining the temperature of the substrate at the same temperature by simultaneously stopping the supplying of the source gases; and forming a second SiC epitaxial layer on the first SiC epitaxial layer by simultaneously supplying the source gases with the concentration ratio of 0.7 to 1.2 and supplying the dopant gas, by using the hydrogen gas as the carrier gas, while maintaining the temperature of the substrate at the same temperature.
申请公布号 JP2015002207(A) 申请公布日期 2015.01.05
申请号 JP20130124838 申请日期 2013.06.13
申请人 SHOWA DENKO KK 发明人 FUKADA KEISUKE;MIYASAKA AKIRA;TAJIMA YUTAKA;MOMOSE KENJI
分类号 H01L21/205;C23C16/42;C23C16/52;C30B25/20;C30B29/36 主分类号 H01L21/205
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