DYNAMIC TAG COMPARE CIRCUITS EMPLOYING P-TYPE FIELD-EFFECT TRANSISTOR (PFET)-DOMINANT EVALUATION CIRCUITS FOR REDUCED EVALUATION TIME, AND RELATED SYSTEMS AND METHODS

摘要

Dynamic tag compare circuits employing P-type Field-Effect Transistor (PFET)-dominant evaluation circuits for reduced evaluation time, and thus increased circuit performance, are provided. A dynamic tag compare circuit may be used or provided as part of searchable memory, such as a register file or content-addressable memory (CAM), as non-limiting examples. The dynamic tag compare circuit includes one or more PFET-dominant evaluation circuits comprised of one or more PFETs used as logic to perform a compare logic function. The PFET-dominant evaluation circuits are configured to receive and compare input search data to a tag(s) (e.g., addresses or data) contained in a searchable memory to determine if the input search data is contained in the memory. The PFET-dominant evaluation circuits are configured to control the voltage/value on a dynamic node in the dynamic tag compare circuit based on the evaluation of whether the received input search data is contained in the searchable memory.

主权项

1. A dynamic tag compare circuit, comprising:
a pre-discharge circuit coupled to an evaluation node, the pre-discharge circuit configured to pre-discharge the evaluation node during a pre-discharge phase; a P-type Field-Effect Transistor (PFET)-dominant evaluation circuit comprising at least one search data input configured to receive at least one input search data, and at least one stored data input configured to receive at least one input stored data; and the PFET-dominant evaluation circuit configured to charge the evaluation node in an evaluation phase based on a comparison of the least one input search data to the at least one input stored data.