MEMORY CELL UNIT, NONVOLATILE SEMICONDUCTOR STORAGE DEVICE INCLUDING MEMORY CELL UNIT, AND MEMORY CELL ARRAY DRIVING METHOD

摘要

A memory cell unit is provided to prevent a memory cell from being mistakenly written by a select transistor at a source by embodying a sufficient breakdown voltage. A high density impurity diffusion layer is formed as a source diffusion layer on at least a part of a semiconductor substrate. A column-shaped semiconductor layer(110) has the first low density impurity layer formed in a drain diffusion layer in the uppermost part of the substrate and in the bottom part of the substrate, vertical to the substrate. A memory cell array is formed on the circumferential wall of the column-shaped semiconductor layer, including a plurality of memory cells vertically and serially connected to the substrate. The memory cell has a charge accumulation layer and a control gate. The second impurity diffusion layer is formed in the lower end of the memory cell array. A select transistor has a gate electrode formed in the periphery of the circumferential wall of the column-shaped semiconductor layer, connecting the second impurity diffusion layer with the first impurity diffusion layer. The first impurity layer confronts the gate electrode of the select transistor to extend to a part of a channel region formed on the circumferential wall of the column-shaped semiconductor layer.