Asymmetrically stressed field effect transistor in dynamic cell

摘要

In some embodiments, a circuit element includes a first FET and a first storage capacitor. The first FET includes a gate stack, a first source or drain region, a second source or drain region and a body structure. The gate stack is configured over the body structure. The first source or drain region and the second source or drain region are configured on opposite sides of the gate stack. The first storage capacitor includes an anode and a cathode. The first source or drain region is coupled to the anode of the first storage capacitor non-selectively, and does not have stressor material with a lattice constant different from that of a channel region in the body structure. The second source or drain structure is coupled to the anode of the first storage capacitor selectively, and has the stressor material.

主权项

1. A circuit element, comprising:
a first field effect transistor (FET), comprising a gate stack, a first source or drain region, a second source or drain region and a body structure, wherein
the gate stack is configured over the body structure;the first source or drain region and the second source or drain region are configured on opposite sides of the gate stack; and a first storage capacitor, comprising an anode and a cathode; wherein
the first source or drain region is coupled to the anode of the first storage capacitor non-selectively, and does not have stressor material with a lattice constant different from that of a channel region in the body structure; andthe second source or drain structure is coupled to the anode of the first storage capacitor selectively, and has the stressor material.