LINE-MULTIPLEXED UART

摘要

A line multiplexed UART interface is provided that multiplexes a UART transmit and CTS functions on a transmit pin and that multiplexes a UART receive and RTS functions on a receive pin. In this fashion, the conventional need for an additional RTS pin and an additional CTS pin is obviated such that the line multiplexed UART interface uses just the transmit pin and the receive pin.

主权项

1. An integrated circuit, comprising:
a universal asynchronous receiver transmitter (UART) transmit terminal; a transmit buffer coupled to the UART transmit terminal, the transmit buffer being configured to select for an output impedance from the group consisting of a first output impedance and a second output impedance, the first output impedance being greater than the second output impedance; and a clear to send (CTS) control circuit configured to detect a CTS signal received on the UART transmit terminal.