发明名称 III-V MOSFET WITH STRAINED CHANNEL AND SEMI-INSULATING BOTTOM BARRIER
摘要 Embodiments include a method for fabricating a semiconductor device and the resulting structure comprising forming a semi-insulating bottom barrier on a semiconductor substrate. A channel is formed on the bottom barrier. A semi-insulating layer is epitaxially formed on the bottom barrier, laterally adjacent to the channel. The semi-insulating layer is formed in such a way that stress is induced onto the channel. A CMOS transistor is formed on the channel.
申请公布号 US2016343826(A1) 申请公布日期 2016.11.24
申请号 US201615229198 申请日期 2016.08.05
申请人 International Business Machines Corporation 发明人 Basu Anirban;Cohen Guy;Majumdar Amlan
分类号 H01L29/66;H01L29/78;H01L29/10;H01L29/06 主分类号 H01L29/66
代理机构 代理人
主权项 1. A method for constructing a MOSFET semiconductor device, the method comprising: epitaxially forming a channel on a bottom barrier, wherein the bottom barrier is semi-insulating, and strain is induced onto the channel; forming a gate structure on the channel; forming a source region and a drain region on the channel laterally adjacent to the gate structure; and epitaxially forming a semi-insulating layer of a height adjacent to the channel on the bottom barrier, wherein the semi-insulating layer induces a strain onto the channel;
地址 Armonk NY US