发明名称 Metal stack for reduced gate resistance
摘要 A method includes forming an n-FET device and a p-FET device on a substrate, each of the n-FET device and the p-FET device include a metal gate stack consisting of a titanium-aluminum carbide (TiAlC) layer above and in direct contact with a titanium nitride (TiN) cap, and removing, from the p-FET device, the TiAlC layer selective to the TiN cap. The removal of the TiAlC layer includes using a selective TiAlC to TiN wet etch chemistry solution with a substantially high TiAlC to TiN etch ratio such that the TiN cap remains in the p-FET device.
申请公布号 US9343372(B1) 申请公布日期 2016.05.17
申请号 US201414583835 申请日期 2014.12.29
申请人 GlobalFoundries, Inc. 发明人 Bao Ruqiang;Kwon Unoh;Rajaram Rekha;Wong Keith Kwong Hon
分类号 H01L21/8238;H01L27/092;H01L29/40;H01L29/51;H01L21/3213;H01L29/66;H01L29/49 主分类号 H01L21/8238
代理机构 Hoffman Warnick LLC 代理人 Cai Yuanmin;Hoffman Warnick LLC
主权项 1. A method comprising: forming an n-FET device and a p-FET device on a substrate, wherein each of the n-FET device and the p-FET device include a metal gate stack comprising a titanium-aluminum carbide (TiAlC) layer above and in direct contact with a titanium nitride (TiN) cap; and removing, from the p-FET device, the TiAlC layer selective to the TiN cap, wherein removing the TiAlC layer comprises using a selective TiAlC to TiN wet etch chemistry solution with a substantially high TiAlC to TiN etch ratio such that the TiN cap remains in the p-FET device.
地址 Grand Cayman KY
您可能感兴趣的专利