STRAIN COMPENSATION IN TRANSISTORS

摘要

Transistor structures having channel regions comprising alternating layers of compressively and tensilely strained epitaxial materials are provided. The alternating epitaxial layers can form channel regions in single and multigate transistor structures. In alternate embodiments, one of the two alternating layers is selectively etched away to form nanoribbons or nanowires of the remaining material. The resulting strained nanoribbons or nanowires form the channel regions of transistor structures. Also provided are computing devices comprising transistors comprising channel regions comprised of alternating compressively and tensilely strained epitaxial layers and computing devices comprising transistors comprising channel regions comprised of strained nanoribbons or nanowires.

主权项

1. A semiconductor device, comprising:
a semiconductor fin disposed above a substrate, the semiconductor fin comprising a compressively strained semiconductor layer above the substrate and a tensilely strained semiconductor layer on the compressively strained semiconductor layer; a gate structure disposed on a top and along sidewalls of the semiconductor fin, the gate structure comprising a gate electrode disposed on a gate dielectric layer, and the gate structure defining a channel region comprising the compressively strained semiconductor layer and the tensilely strained semiconductor layer of the semiconductor fin; and source and drain regions disposed on either side of the gate structure, adjacent to the channel region.