发明名称 |
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME |
摘要 |
A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit. |
申请公布号 |
US2016190152(A1) |
申请公布日期 |
2016.06.30 |
申请号 |
US201615064270 |
申请日期 |
2016.03.08 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
FUKUZUMI Yoshiaki;KATSUMATA Ryota;KITO Masaru;KIDOH Masaru;TANAKA Hiroyasu;KOMORI Yosuke;ISHIDUKI Megumi;MATSUNAMI Junya;FUJIWARA Tomoko;AOCHI Hideaki;KlRISAWA Ryouhei;MIKAJIRI Yoshimasa;OOTA Shigeto |
分类号 |
H01L27/115 |
主分类号 |
H01L27/115 |
代理机构 |
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代理人 |
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主权项 |
1. A nonvolatile semiconductor memory device, comprising:
a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit. |
地址 |
Minato-ku JP |