发明名称 |
Programmable built in self test of memory |
摘要 |
The pBIST solution to memory testing is a balanced hardware-software oriented solution. pBIST hardware provides access to all memories and other such logic (e.g. register files) in pipelined logic allowing back-to-back accesses. The approach then gives the user access to this logic through CPU-like logic in which the programmer can code any algorithm to target any memory testing technique required. Because hardware inside the chip is used at-speed, the full device speed capabilities are available. CPU-like hardware can be programmed and algorithms can be developed and executed after tape-out and while testing on devices in chip form is in process.
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申请公布号 |
US2005172180(A1) |
申请公布日期 |
2005.08.04 |
申请号 |
US20040003206 |
申请日期 |
2004.12.03 |
申请人 |
DAMODARAN RAGURAM;ANDERSON TIMOTHY D.;AGARWALA SANJIVE;GRABER JOEL J. |
发明人 |
DAMODARAN RAGURAM;ANDERSON TIMOTHY D.;AGARWALA SANJIVE;GRABER JOEL J. |
分类号 |
G11C29/00;G11C29/16;(IPC1-7):G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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