Zero Voltage Soft Switching Scheme for Power Converters

摘要

A control scheme and architecture for a power conversion circuit employs two bidirectional switches and a zero voltage switching (ZVS) scheme for the high-side switch. Methods of incorporating the control scheme into multiple power conversion circuit topologies are disclosed. Methods of device integration including co-packaging and monolithic fabrication are also disclosed.

主权项

1. A power conversion circuit comprising:
a voltage source having first and second output terminals configured to supply power to the power conversion circuit; a first solid-state switch having a pair of first power terminals and a first gate terminal wherein one of the pair of first power terminals are connected to a switch node of the power conversion circuit; a first driver circuit transmitting a first gate drive signal to the first gate terminal in response to receiving a first gate control signal; a second solid-state switch having a pair of second power terminals and a second gate terminal, wherein one of the pair of second power terminals are connected to the switch node of the power conversion circuit; a second driver circuit transmitting a second gate drive signal to the second gate terminal in response to receiving a second gate control signal; an inductor having a pair of inductor terminals, wherein one of the pair of inductor terminals are connected to the switch node of the power conversion circuit; and a controller configured to:
transmit the first and the second gate control signals such that the second switch turns on before the first switch turns on, with a duration that is (1) less than a time that the first switch is off and (2) of adequate time to reverse a direction of current flow within the inductor to generate a quantity of negative inductor current; andtransmit the second gate control signal turning the second switch off causing the quantity of negative inductor current to (1) discharge an output capacitance of the first switch and (2) discharge a capacitance of the switch node.