发明名称 CHANNEL CLADDING LAST PROCESS FLOW FOR FORMING A CHANNEL REGION ON A FINFET DEVICE HAVING A REDUCED SIZE FIN IN THE CHANNEL REGION
摘要 One method of forming epi semiconductor cladding materials in the channel region of a semiconductor device is disclosed which includes forming a sacrificial gate structure around a portion of an initial fin, forming a sidewall spacer adjacent opposite sides of the sacrificial gate structure and removing the sacrificial gate structure so as to thereby define a replacement gate cavity, performing an etching process through the replacement gate cavity to remove portions of the initial fin so as to thereby define a reduced size fin and recesses under the sidewall spacers, forming at least one replacement epi semiconductor cladding material around the reduced size fin in the replacement gate cavity and in the recesses under the sidewall spacers, and forming a replacement gate structure within the replacement gate cavity around the at least one replacement epi semiconductor cladding material.
申请公布号 US2016204261(A1) 申请公布日期 2016.07.14
申请号 US201615073936 申请日期 2016.03.18
申请人 GLOBALFOUNDRIES Inc. 发明人 Jacob Ajey Poovannummoottil;Maszara Witold P.;Fronheiser Jody A.
分类号 H01L29/78;H01L29/10;H01L29/51;H01L29/66;H01L21/306 主分类号 H01L29/78
代理机构 代理人
主权项 1. A method of forming a FinFET device with a channel region, the method comprising: forming an initial fin in a semiconductor substrate; forming a sacrificial gate structure around a portion of said initial fin; forming a sidewall spacer adjacent opposite sides of said sacrificial gate structure; removing said sacrificial gate structure so as to thereby define a replacement gate cavity that is laterally defined by said sidewall spacers, wherein formation of said replacement gate cavity exposes a portion of said initial fin within said replacement gate cavity; performing an etching process through said replacement gate cavity to remove portions of said initial fin so as to thereby define a reduced size fin and recesses under said sidewall spacers; forming at least one replacement epi semiconductor cladding material around said reduced size fin in said replacement gate cavity and in said recesses under said sidewall spacers; and forming a replacement gate structure within said replacement gate cavity around said at least one replacement epi semiconductor cladding material.
地址 Grand Cayman KY