Low-power source-synchronous signaling

摘要

Within a system of integrated circuit devices, first and second signals are transmitted intermittently from a first integrated circuit device to a second integrated circuit device. The second integrated circuit device generates a timing signal based on transitions of the second signal and generates samples of the first signal in response to transitions of the timing signal. The second integrated circuit device further generates timing error information based on the samples of the first signal, the timing error information to enable adjustment of the relative phases of the timing signal and the first signal.

主权项

1. A method of operation within a digital system, the method comprising:
receiving a data signal at a first IC device over each one of at least two parallel data links; receiving a timing signal at the first IC device on a dedicated link, the timing signal generated from a second IC device; distributing a sampling signal based on the timing signal using a timing signal distribution network within the first IC device to each of a plurality of samplers, at least one sampler per external data link, to responsively sample the associated data signal; obtaining a reference that represents the timing of the data signals, independent of the timing signal distribution network, and comparing the reference and the sampling signal; adjusting one of (1) the relation between the timing signal and the data signals or (2) the relation between the sampling signal and the data signals to compensate for relative delay imparted by the timing signal distribution network; and wherein the comparing includes providing an error signal to the second IC device to generate an adjustment to one of (1) the timing signal, (2) the sampling signal, or (3) transmit timing for the data signals to provide the compensation.