Risa controller for an RF integrated circuit (RFIC) having improved execution speed

摘要

An RFIC controller configured for executing multiple tasks. A serial interface is included having a serial bus (1010) for receiving a data stream having control bits and data bits. One or more registers are coupled to the serial bus for storing the control bits and data bits as they are received. Control circuitry (850) is also included. The data stream is formatted such that the control bits are received before the data bits, the control bits specifying an operation. The control circuitry (850) is configured to examine the control bits as they are received to determine the operation specified by the control bits before the data bits are received. A task corresponding to the operation specified by the control bits is then initiated before the data bits are received.