Methods for Data Acquisition Systems in Real Time Applications

摘要

A system may include a processing unit executing program instructions (SW), a data acquisition (DAQ) hardware device for acquiring sample data and/or generating control signals, and host memory configured to store data samples and various data associated with the DAQ and processor operations. The DAQ device may push HW status information to host memory upon being triggered by predetermined events taking place in the DAQ device, e.g. timing events or interrupts, to avoid or reduce SW reads to the DAQ device. The DAQ device may update dedicated buffers in host memory with status data on any of these events. The status information pushed to memory may be read in a manner that allows detection of race conditions. Interrupts generated by the DAQ device may be similarly handled. Upon generating an interrupt, the DAQ device may gather information required to handle the interrupt, and push the information into system memory, along with information identifying the interrupt. SW may read system memory for this information, and handle the interrupts as required without having to query the DAQ device.

主权项

1. A peripheral device comprising:
error detection circuitry configured to perform data timing error detection, wherein to perform the data timing error detection, the error detection circuitry is configured to:
receive incoming data from a host system;detect a present first error if expected first data of the incoming data does not reach the peripheral device in time to be available for a present sample clock period, and report the present first error to the host system upon detecting the present first error;detect a present second error if more than the expected first data reaches the peripheral device and is available for the present sample clock period, and report the present second error to the host system upon detecting the present second error; andreport to the host system whether expected second data of the incoming data has been received correctly for a most recent previous sample clock period.