发明名称 Prioritising of Instruction Fetching in Microprocessor Systems
摘要 A method and a system are provided for prioritising the fetching of instructions for each of a plurality of executing instruction threads in a multi-threaded processor. Instructions come from at least one source of instructions. Each thread has a number of threads buffered for execution in an instruction buffer. A first metric for each thread is determined based on the number of instructions currently buffered. A second metric is then determined for each thread, this being an execution based metric. A priority order for the threads is determined from the first and second metrics, and an instruction is fetched from the source for the thread with the highest determined priority which is requesting an instruction.
申请公布号 US2016232007(A1) 申请公布日期 2016.08.11
申请号 US201615134510 申请日期 2016.04.21
申请人 Imagination Technologies Limited 发明人 Webber Andrew
分类号 G06F9/38;G06F1/10;G06F9/30 主分类号 G06F9/38
代理机构 代理人
主权项 1. A method for prioritizing fetching of instructions in a multithreaded processor system, comprising: determining a first metric for each thread of a plurality of threads executing on said multithreaded processor system based on the number of instructions currently buffered for execution on that thread; determining a second metric for each thread respectively based on at least one execution parameter for that thread; determining a ranked priority order for the threads from the first and second metrics; and fetching an instruction for the thread with the highest determined priority in the ranked priority order from a source of instructions.
地址 Kings Langley GB