发明名称 SCHMITT TRIGGER CIRCUIT AND NON-VOLATILE MEMORY DEVICE INCLUDING THE SAME
摘要 A Schmitt trigger circuit includes a first inverter, second inverter, first feedback unit, and second feedback unit. The first inverter includes a PMOS transistor unit and an NMOS transistor unit which generate an internal signal by inverting an input signal based on a first feedback signal and provide the internal signal to a first node. A second inverter generates an output signal by inverting the first signal. A first feedback unit generates a first feedback signal providing a first hysteresis character to a first unit among the PMOS transistor unit and NMOS transistor unit based on a first signal of the first node. A second feedback unit generates a second feedback signal providing a second hysteresis character to a second unit among the PMOS transistor unit and NMOS transistor unit based on the output signal. The second feedback unit provides the second feedback signal to the first node.
申请公布号 US2016241220(A1) 申请公布日期 2016.08.18
申请号 US201614995575 申请日期 2016.01.14
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 RAJAGOPAL DEVRAJ MATHARAMPALLIL;KANG KYOUNG-TAE
分类号 H03K3/3565;H03K3/356 主分类号 H03K3/3565
代理机构 代理人
主权项 1. A Schmitt trigger circuit comprising: a first inverter including a PMOS transistor unit and an NMOS transistor unit which generate an internal signal by inverting an input signal based on a first feedback signal and provide the internal signal to a first node; a second inverter configured to generate an output signal by inverting a first signal of the first node; a first feedback unit configured to generate the first feedback signal providing a first hysteresis character to a first unit among the PMOS transistor unit and the NMOS transistor unit based on the first signal of the first node; and a second feedback unit configured to generate a second feedback signal providing a second hysteresis character to a second unit among the PMOS transistor unit and the NMOS transistor unit based on the output signal, the second feedback configured to provide the second feedback signal to the first node and the second hysteresis character having the same size as the first hysteresis character.
地址 SUWON-SI KR