发明名称 |
INJECTION-LOCKED FREQUENCY DIVIDER AND PLL CIRCUIT |
摘要 |
An injection locked frequency divider and a PLL circuit, having a wide operating frequency bandwidth and capable of reducing the influence of any parasitic capacitance, are provided. Injection locked frequency divider (100) includes ring oscillator 140 that cascade-connects first amplifier circuit (141) including N-channel MOS transistor (111) and P-channel MOS transistor (112), and second amplifier circuit 142 and third amplifier circuit (143) that have the same configuration as first amplifier circuit (141) in three stages in a ring; N-channel MOS transistor 150 in which the sources of N-channel MOS transistors (111, 121, 131) in the respective stages are connected to the drain thereof; and differential signal injection circuit (160) that injects injection signal 11 to the gates of P-channel MOS transistors (112, 122, 132) in the respective stages and injects a reverse phase signal of injection signal 11 as a differential signal to the gate of N-channel MOS transistor (150). |
申请公布号 |
EP2528232(A4) |
申请公布日期 |
2016.10.19 |
申请号 |
EP20110734525 |
申请日期 |
2011.01.21 |
申请人 |
PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD. |
发明人 |
SHIMA, TAKAHIRO;SATO, JUNJI;KOBAYASHI, MASASHI |
分类号 |
H03K3/354;H03K3/03;H03K3/2885;H03K27/00;H03L7/08;H03L7/10 |
主分类号 |
H03K3/354 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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