发明名称 CIRCUIT TEST APPARATUS
摘要 <P>PROBLEM TO BE SOLVED: To provide a circuit test apparatus which can reduce man-hours and costs required for a test on the operation of the connection between boards under test. <P>SOLUTION: A control CPU 1 inputs a test signal to the board under test 2 through a distribution circuit 10 from a JTAG-standard-ready SDI terminal and inputs a signal from a jig 3 from its SDO terminal. The distribution circuit 10 connects the SDI terminal of the control CPU 1 and an SDI terminal of the board under test 2, connects the SDO terminal of the control CPU 1 and an SDO terminal of the jig 3, and connects an SDO terminal of the board under test 2 and an SDI terminal of the jig 3. A single loop is formed allowing the test signal generated by the control CPU 1 to be input to the SDO terminal of the control CPU 1 through the board under test 2 and the jig 3. Using the single loop allows for the use of pattern data for performing a test created by commercial scan testware. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008089340(A) 申请公布日期 2008.04.17
申请号 JP20060268154 申请日期 2006.09.29
申请人 YOKOGAWA ELECTRIC CORP 发明人 SAITO FUMIHIRO
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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