| 摘要 |
Provided are a method and apparatus for realizing functions of receiving and sending a packet, wherein the method comprises: acquiring a designated hardware thread of a multi-core central processing unit (CPU) device; and simulating functions of receiving and sending a packet of a field programmable gate array (FPGA) according to the designated hardware thread. Using the above-mentioned technical solution provided in the present invention solves the problem in the related art of increase in hardware costs caused by using FPGA hardware when relevant functions of OAM are realized, thereby saving the hardware costs. |
