| 摘要 |
An ESD protection device for a semiconductor circuit is provided to restrain the focusing of heat and current and to reduce triggering voltage by forming an STI layer between a gate and a drain. A gate(52) is formed on a semiconductor substrate(51) of first conductive type. A heavily doped source(53) and drain(54) of second conductive type are formed in the substrate of both sides of the gate. An STI layer(55) is formed at boundary region between the gate and the drain. A first conductive type well(56) is formed in the substrate to surround a half portion of the drain. A second conductive type buried layer(57) is formed in the substrate to prolong horizontally from the well to the source.
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