| 摘要 |
A peak detector circuit comprises a first output coupled to ground by a first load and to emitter terminals of first and second switching devices. A second output is coupled to ground by a second load and to emitter terminals of third and fourth switching devices. A third output is coupled to a supply voltage node by a third load and to collector terminals of the first and second switching devices. A fourth output is coupled to the supply voltage node by a fourth load and to collector terminals of the third and fourth switching devices. The first, second, third, and fourth switching devices have control terminals which are biased with a common bias voltage. The first, second, third and fourth load are selected so that R1=R2=αf*R3=αf*R4, with R1, R2, R3, R4 being a resistance of the first, second, third and fourth loads, respectively, and αf a common-base current gain of the switching devices. |
| 主权项 |
1. A peak detector circuit comprising:
a first switching device having a collector terminal, an emitter terminal and a control terminal; a second switching device having a collector terminal, an emitter terminal and a control terminal; a third switching device having a collector terminal, an emitter terminal and a control terminal; a fourth switching device having a collector terminal, an emitter terminal and a control terminal; a first load having a first and a second terminal, said first terminal of said first load being connected to ground; a second load having a first and a second terminal, said first terminal of said second load being connected to ground; a third load having a first and a second terminal, said first terminal of said third load being connected to a supply voltage node; a fourth load having a first and a second terminal, said first terminal of said fourth load being connected to said supply voltage node; a first output coupled to said second terminal of said first load and coupled to both the emitter terminals of said first and second switching device; a second output coupled to said second terminal of said second load and coupled to both emitter terminals of said third and fourth switching device; a third output coupled to said second terminal of said third load and coupled to both collector terminals of said first and second switching device; a fourth output coupled to said second terminal of said fourth load, and coupled to both collector terminals of said third and fourth switching device, where said control terminals of said first and second switching devices are arranged to receive a differential input voltage, whereby said control terminals of said first, second, third, and fourth switching devices are arranged to be biased with a common DC bias voltage, so that the DC biasing term from the output can be fully compensated each other, and whereby said first, second, third and fourth load are selected so that:
R1=R2=αf*R3=αf*R4,with R1, R2, R3, R4 a resistance of said first, second, third and fourth load, respectively, and αf a common-base current gain of said switching devices. |
