发明名称 SERIAL/PARALLEL CONVERTER
摘要 PROBLEM TO BE SOLVED: To enhance a level difference between a high level and a low level of a conversion signal converted from an electric pulse.SOLUTION: In a transistor T1, one of the drain terminal and the source terminal is connected to a transmission line TL1, and a gate pulse is input to the gate terminal. One terminal of a capacitor C1 is connected to the other one of the drain terminal and the source terminal of the transistor T1, whereas another terminal is grounded. One terminal of a resistor R1 is connected to the other one of the drain terminal and the source terminal of the transistor T1, whereas to another terminal, a DC voltage Vchrg is supplied. In synchronization with an electric pulse propagating through a transmission line TL1, the gate pulse is input, so that a voltage according to a high/low electric pulse is retained at the capacitor C1.SELECTED DRAWING: Figure 1
申请公布号 JP2016178580(A) 申请公布日期 2016.10.06
申请号 JP20150059045 申请日期 2015.03.23
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 SALAH IBRAHIM;TAKAHASHI AKIRA;ISHIKAWA YUJI
分类号 H03M9/00 主分类号 H03M9/00
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