发明名称 METHOD FOR ARRANGING VIA, AND METHOD FOR MANUFACTURING WIRING SUBSTRATE
摘要 PROBLEM TO BE SOLVED: To suppress a factor which deteriorate substrate characteristics by securing a pattern width which becomes broad enough in a power supply system pattern. SOLUTION: When in the process of arranging a via 4, a clearance 5 around the via 4 is divided into a clearance region continued by a predetermined number (6), the via 4 is arranged so that a power supply system pattern 6 of the width for one pitch is arranged continuously between the adjacent clearance regions. Moreover, the via 4 is arranged so that a signal wiring 3 does not cross the clearance region and is arranged in the region where the power supply system pattern 6 is arranged. Further, the via 4 is arranged in the center surrounded by a terminal 2 in a predetermined position in the terminal arrangement region where the terminal 2 of the semiconductor device is arranged with equal pitch in X direction and Y direction. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008227168(A) 申请公布日期 2008.09.25
申请号 JP20070063717 申请日期 2007.03.13
申请人 ELPIDA MEMORY INC 发明人 TAKASO MASAKAZU
分类号 H05K3/00;H05K1/02;H05K3/46 主分类号 H05K3/00
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