| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit mounting a programmable logic device (PLD) which enables update of high speed structural information by controlling increase in the display area of the PLD through enhancement of application efficiency of logic cells in the PLD. SOLUTION: The semiconductor integrated circuit mounting the PLD comprises a first programmable cell (hereinafter referred to as PC) 210 for conducting logical operations of a small number of bits, a second PC 211 for arithmetic operations of a large number of bits, first and second memories 220, 221 for storing structural information for the first and second PC, first and second data buses 230, 231 for setting the structural information for the first and second PC, and third and fourth data buses 240, 241 for setting the structural information to the first and second memories. The design data for realizing the desired data processing function are realized on the PC suitable for the processes, and the structural information of PC210 and 211 is independently set and updated. COPYRIGHT: (C)2007,JPO&INPIT
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