INTEGRATED CIRCUITS WITH SELETIVE GATE ELECTRODE RECESS

摘要

Integrated circuits including MOSFETs with selectively recessed gate electrodes. Transistors having recessed gate electrodes with reduced capacitive coupling area to adjacent source and drain contact metallization are provided alongside transistors with gate electrodes that are non-recessed and have greater z-height. In embodiments, analog circuits employ transistors with gate electrodes of a given z-height while logic gates employ transistors with recessed gate electrodes of lesser z-height. In embodiments, subsets of substantially planar gate electrodes are selectively etched back to differentiate a height of the gate electrode based on a given transistor's application within a circuit.

主权项

1. A semiconductor structure, comprising:
a first gate electrode of a logic device, the first gate electrode having a first bottom electrode surface proximate to a first gate dielectric disposed over a first semiconductor channel region and having a first top electrode surface at a first height from the first bottom gate electrode surface; and a second gate electrode of an analog device, the second gate electrode having a second bottom electrode surface proximate to a second gate dielectric disposed over a second semiconductor channel region and having a second top electrode surface at a second height from the second bottom electrode surface, wherein at least a portion of a first top electrode surface is below at least a portion of the second top electrode surface.