| 摘要 |
A shift register unit, a driving method thereof, a gate driving circuit and a display device, wherein the shift register unit includes a pull-up module, a first input module, a second input module, a pull-down control module and a pull-down module. By such a shift register unit, it can be avoided that a scan signal is outputted to the corresponding gate line during the non-output phase in error, improving the stability and reliability of the circuit. |
| 主权项 |
1. A shift register unit comprising a pull-up module, a first input module, a second input module, a pull-down control module and a pull-down module, wherein
the pull-up module is connected to a pull-up node, a first clock signal terminal and a signal output terminal, and configured to transmit a signal input from the first clock signal terminal to the signal output terminal under a control of the pull-up node; the first input module is connected to a first signal input terminal, a first voltage terminal and the pull-up node, and configured to pull a voltage of the pull-up node to a voltage of the first voltage terminal under a control of a signal input from the first signal input terminal; the second input module is connected to a second signal input terminal, a second voltage terminal and the pull-up node, and configured to pull the voltage of the pull-up node to a voltage of the second voltage terminal under a control of a signal input from the second signal input terminal; the pull-down control module is connected to the second clock signal terminal, the pull-up node, a pull-down node and a third voltage terminal, and configured to pull a potential of the pull-down node to a voltage of the third voltage terminal under a control of the pull-up node, or input a signal input from the second clock signal terminal to the pull-down node under a control of the signal input from the second clock signal terminal; and the pull-down module is connected to the pull-down node, the pull-up node, the signal output terminal and the third voltage terminal, and configured to pull a potential of the pull-up node and a voltage output from the signal output terminal to the voltage of the third voltage terminal. |
