POWER CONSUMPTION REDUCTION CIRCUIT, ESPECIALLY INCLUDING A SWITCH UNIT FOR CONTROLLING A POWER LINE SUPPLIED TO A MEMORY CELL

摘要

PURPOSE: A power consumption reduction circuit is provided to minimize current consumption in a standby mode, by using a power supply line differently in a normal operation mode and the standby mode according to a chip enable bar signal. CONSTITUTION: The power consumption reduction circuit has a current control circuit(12). The current control circuit controls a power supply voltage to be supplied from a power supply line differently in a normal operation mode and in a standby mode of a SRAM according to a chip enable signal between a power supply port(Vcc) and a memory cell(11). According to the current control circuit, the first inverter(13) receives the chip enable signal. The second inverter(14) inverts the output of the first inverter. And a switching unit(15) switches the power line supplied from the power supply port to the memory cell according to the output of the second inverter.