发明名称 ハイブリッドメモリのためのシステム、方法及び装置
摘要 Embodiments of the invention are generally directed to systems, methods, and apparatuses for hybrid memory. In one embodiment, a hybrid memory may include a package substrate. The hybrid memory may also include a hybrid memory buffer chip attached to the first side of the package substrate. High speed input/output (HSIO) logic supporting a HSIO interface with a processor. The hybrid memory also includes packet processing logic to support a packet processing protocol on the HSIO interface. Additionally, the hybrid memory also has one or more memory tiles that are vertically stacked on the hybrid memory buffer.
申请公布号 JP5676644(B2) 申请公布日期 2015.02.25
申请号 JP20120547101 申请日期 2010.12.10
申请人 发明人
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
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