发明名称 Wafer level ball grid array
摘要 A manufacturing technique that involves embedding one or more semiconductor die into a support substrate and forming conductive traces that lead from die contact pads to redistributed contact pads on the support substrate. Active surfaces of the dice and a working surface of the support substrate are substantially coplanar and the conductive traces are formed on the coplanar surfaces. The redistributed contact pads are sufficiently spaced apart from each other so that conductive balls can be formed thereon. Individual semiconductor device packages are singulated from the support substrate.
申请公布号 US2006125115(A1) 申请公布日期 2006.06.15
申请号 US20060351103 申请日期 2006.02.08
申请人 NATIONAL SEMICONDUCTOR CORPORATION 发明人 CHEE LEE C.;A. THARUMALINGAM SRI GANESH A.
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人
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