发明名称 Control system with both fast sample time and long gate time
摘要 Disclosed are control systems, and more specifically control systems which benefit from a long-gate time for measurement and a rapid sample time to enhance responsiveness and methods and systems for utilizing multiple-staggered, overlapping gates where the gate time is an integer multiple of the time between ends of adjacent gates. The system continuously counts at the wavefronts or zero-crossings of a frequency reference signal and temporarily records them in registers and compares the contents of registers separated by a gate time and outputs a sample after every sample time.
申请公布号 US8975969(B1) 申请公布日期 2015.03.10
申请号 US201313746714 申请日期 2013.01.22
申请人 Rockwell Collins, Inc. 发明人 Meholensky Michael C.;Olen Vadim;Hill Adrian A.;Opsahl Paul L.
分类号 H03L7/091;H03B5/32;H03L1/02;H03L7/06 主分类号 H03L7/091
代理机构 代理人 Gerdzhikov Angel N.;Suchy Donna P.;Barbieri Daniel M.
主权项 1. A frequency reference comprising: a. a VCXO for providing an output signal to be utilized by electronic communication equipment and providing a frequency reference signal to be analyzed; b. a microcontroller configured to provide periodic VCXO control commands at a predetermined sample time; c. a reference crystal oscillator for generating a signal to be used in controlling said VCXO; d. a temperature sensor for providing temperature information used internal to said frequency reference; e. said microcontroller further configured with: i. a gate generator for generating a plurality of identical duration gates which are an integer multiple of the sample time;ii. a counter with overlap configured for; 1. making periodic measurements of an input signal, which measurements are separated in time by the sample time; and2. making a comparison of a measurement taken at a terminal end of one of said plurality of identical duration gates with a measurement of said frequency reference signal taken at an initial end of said one of said plurality of identical duration gates, and generating an output which is representative of said comparison;iii. A loop/filter controller configured for controlling said VCXO with the aid of said output.
地址 Cedar Rapids IA US