发明名称 CONFIGURABLE CLOCK TREE
摘要 System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. A configurable clock tree includes a delay matrix that may be configured such that each the timing of clocks for each of a plurality of data lanes can be optimized for minimum skew. Selections between different versions of a base clock signal and different paths available to the selected version may provide a root clock used for transmitting data on a communications link. The versions of the one or more clock signals may include three versions of a first clock signal. Each version of the first clock signal may be subject to a different delay with respect to the clock signal.
申请公布号 EP3039559(A1) 申请公布日期 2016.07.06
申请号 EP20140766255 申请日期 2014.08.19
申请人 QUALCOMM INCORPORATED 发明人 SHUI, YAXIN
分类号 G06F13/42;G06F1/10 主分类号 G06F13/42
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