发明名称 Computation of a modular multiplication with an electronic circuit
摘要 <p>The invention concerns a computing method performed by an electronic circuit and an electronic circuit for computing a modular operation with at least one operand (R) having a binary representation, at least comprising iteratively for each bit of this operand: doubling (33) the value of an intermediate result (Z) stored in a first memory element by shifting the bits of the intermediate result towards the most significant bit; and while (34) the most significant bit of the intermediate result is one, updating this intermediate result by subtracting the modulus (n) stored in a second memory element.</p>
申请公布号 EP1845442(A1) 申请公布日期 2007.10.17
申请号 EP20060112507 申请日期 2006.04.11
申请人 STMICROELECTRONICS S.R.L.;STMICROELECTRONICS LIMITED 发明人 BERTONI, GUIDO MARCO;FRAGNETO, PASQUALINA;MARSH, ANDREW;PELOSI, GERARDO;RAVASIO, MORIS
分类号 G06F7/72 主分类号 G06F7/72
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