发明名称 |
半導体装置およびその製造方法 |
摘要 |
Provided is a double-sided cooling structure for a semiconductor device using a low processing temperature and reduced processing time utilizing solid phase diffusion bonding. The fabrication method for this system is provided. The semiconductor device 1 comprising: a mounting substrate 70; a semiconductor chip 10 disposed on the mounting substrate 70 and a semiconductor substrate 26, a source pad electrode SP and a gate pad electrode GP disposed on a surface of the semiconductor substrate 26, and a drain pad electrode 36 disposed on a back side surface of the semiconductor substrate 26 to be contacted with the mounting substrate 70; and a source connector SC disposed on the source pad electrode SP. The mounting substrate 70 and the drain pad electrode 36 are bonded by using solid phase diffusion bonding. |
申请公布号 |
JP6006966(B2) |
申请公布日期 |
2016.10.12 |
申请号 |
JP20120093101 |
申请日期 |
2012.04.16 |
申请人 |
ローム株式会社;クリー・ファイエットビル・インコーポレイテッド |
发明人 |
大塚 拓一;ブライオン ウェスターン;ブランドン パスモア;ザック コール |
分类号 |
H01L21/52;H01L21/60;H01L23/36;H01L23/48;H01L25/07;H01L25/18 |
主分类号 |
H01L21/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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