| 摘要 |
<p>An array of memory cells includes a plurality of memory cells interconnected via a grid of M wordlines and M bitlines (224), wherein M = 2,3,4,5,..., wherein each of the M bitlines (224) is buried. The array further includes a plurality of contacts (228), wherein each of the plurality of contacts (228) is formed every N wordlines, N = 1,2,3,..., wherein each of the plurality of contacts (228) overlies a gate (229) of a different one of the plurality of memory cells. A strap (230) connects one of the buried bitlines (241) to a gate (229) that underlies one of the plurality of contacts (228), and wherein contacts (228) overlying a first bit line (224) are staggered with respect to contacts (228) overlying a second bit line (224) that is adjacent to the first bit line (224).</p> |
