发明名称 Fully Isolated High-Voltage MOS Device
摘要 A semiconductor structure includes a semiconductor substrate; an n-type tub extending from a top surface of the semiconductor substrate into the semiconductor substrate, wherein the n-type tub comprises a bottom buried in the semiconductor substrate; a p-type buried layer (PBL) on a bottom of the tub, wherein the p-type buried layer is buried in the semiconductor substrate; and a high-voltage n-type metal-oxide-semiconductor (HVNMOS) device over the PBL and within a region encircled by sides of the n-type tub.
申请公布号 US2009008711(A1) 申请公布日期 2009.01.08
申请号 US20070773365 申请日期 2007.07.03
申请人 WEI CHI-SAN;WU KUO-MING;LIN YI-CHUN 发明人 WEI CHI-SAN;WU KUO-MING;LIN YI-CHUN
分类号 H01L29/78 主分类号 H01L29/78
代理机构 代理人
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