发明名称 3DIC方法および装置
摘要 SOLUTION: A method for integrating such elements as isolated dies or a wafer three-dimensionally, and an integrated structure where such elements as isolated dies or a wafer is connected. One or both of the die or wafer has a semiconductor device formed therein. A first element having a first contact structure is bonded to a second element having a second contact structure. The first and second contact structures can be exposed at the time of bonding, and are connected electrically as a result of bonding. After bonding, a via is etched and embedded to expose and form electric wiring for connecting the first and second contact structures, thus allowing electrical access to the electric wiring from the surface. Alternatively, the first and second contact structures are not exposed at the time of bonding, but a via is etched and embedded after bonding thus connecting the first and second contact structures electrically, and electrical access to the first and second contact structures is obtained.SELECTED DRAWING: Figure 20E
申请公布号 JP2016106420(A) 申请公布日期 2016.06.16
申请号 JP20160019820 申请日期 2016.02.04
申请人 ジプトロニクス・インコーポレイテッド 发明人 ポール・エム.・エンクイスト;ガイアス・ギルマン・ジュニア・ファウンテン;チン−イ・トン
分类号 H01L27/00;H01L21/3205;H01L21/60;H01L21/768;H01L23/522 主分类号 H01L27/00
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