| 摘要 |
A DLL circuit includes a first delay line circuit, a first phase comparison circuit, a control circuit, and a first selecting circuit. The first delay line circuit can change a delay amount and provide a delay to a first clock signal. The first phase comparison circuit can detect a phase difference between the first clock signal and an output signal of the first delay line circuit, and a phase difference between a test clock signal of which frequency is lower than the first clock signal and an output signal of the first delay line circuit or a signal after dividing the output signal. The control circuit controls a delay amount of the first delay line circuit according to the detection result of the first phase comparison circuit. The first selecting circuit selectively inputs one of the output signal of the first delay line circuit or an inverted signal thereof and the first clock signal to the first delay line circuit.
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