发明名称 CIRCUIT OPERATION VERIFICATION DEVICE, CIRCUIT OPERATION VERIFICATION METHOD, METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT, CONTROL PROGRAM, AND COMPUTER-READABLE STORAGE MEDIUM
摘要 PROBLEM TO BE SOLVED: To provide a circuit operation verification device capable of accurately verifying delay variation of circuit operation by performing resistance calculation in consideration of a temperature rise by self-heating of wiring. SOLUTION: The circuit operation verification device 100 for verifying a circuit operation of a semiconductor integrated circuit comprises: a temperature distribution table forming part 112 for forming a temperature distribution table showing a temperature distribution in the semiconductor integrated circuit from thermal distribution information preliminarily obtained by thermal analysis simulation; a wiring resistance extraction part 121 for extracting a resistance value of each part (wiring resistance element) of the wiring in the semiconductor integrated circuit from net list information together with its position; and a temperature-dependent wiring resistance calculation part 131 for calculating a temperature-dependent resistance value depending on the temperature from the resistance value of each wiring resistance element by use of the temperature distribution table. In the device, the delay variation of the circuit operation is verified using the temperature-dependent resistance value of each wiring resistance element. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009048505(A) 申请公布日期 2009.03.05
申请号 JP20070215312 申请日期 2007.08.21
申请人 SHARP CORP 发明人 NAKABAYASHI TAMIYO
分类号 G06F17/50;G01R31/28;H01L21/82 主分类号 G06F17/50
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