DIGITAL COMMUNICATION RECEIVER INTERFACE CIRCUIT FOR LINE-PAIR WITH DUTY CYCLE IMBALANCE COMPENSATION

摘要

A circuit (200) includes: a diode bridge (210) having polarity-independent input terminals for coupling to a DALI bus, and having positive and negative output terminals, wherein the diode bridge receives a receive signal from the DALI bus; a galvanic isolation device (220) having an input for receiving the receive signal from the diode bridge, and an output for outputting the receive signal galvanically isolated from the diode bridge and the DALI bus; a receive signal threshold reference device (235) for setting a threshold voltage for the galvanic isolation device to respond to the receive signal; an amplifier (280) for receiving the galvanically isolated receive signal from the galvanic isolation device and outputting a binary digital signal via a low pass filter (290); and a first duty cycle control device (230, 270) for adjusting the timing of rising edges of the galvanically isolated receive signal with respect to its falling edges.

主权项

1. A device, comprising:
an interface circuit configured to interface a Digital Addressable Lighting Interface (DALI) bus with a controller, wherein the interface circuit comprises:
a diode bridge having polarity-independent input terminals configured to be coupled to the DALI bus, and further having a positive output terminal and a negative output terminal, wherein the diode bridge is configured to receive a receive signal from the DALI bus;a current limiter configured to limit an input current supplied to the interface circuit from DALI bus via the diode bridge;an optocoupler having an input configured to receive the receive signal from the diode bridge and having an output configured to output the receive signal, galvanically isolated from the diode bridge and the DALI bus;a receive signal threshold reference device configured to set a threshold voltage for the optocoupler to respond to the receive signal;an optocoupler input current control device configured to divert at least a portion of the current supplied to the interface circuit from being supplied to an input of the optocoupler;an amplifier configured to receive the galvanically isolated receive signal from the optocoupler and to output a binary digital signal;a low-pass filter (LPF) configured to output the binary digital signal to the controller; anda variable edge delay circuit configured to delay rising edges of the galvanically isolated receive signal substantially more than falling edges of the galvanically isolated receive signal, or to delay falling edges of the galvanically isolated receive signal substantially more than rising edges of the galvanically isolated receive signal.