| 发明名称 |
SEMICONDUCTOR DEVICE AND CLOCK CORRECTION METHOD |
| 摘要 |
A frequency error calculator includes a first logic circuit that receives a control signal and a clock, a second logic circuit that receives the control signal and a reference signal, a divider circuit that receives a logical product value of the control signal and the clock from the first logic circuit, and a counter that receives the logical product value of both the control signal and a reference signal. The divider circuit generates a divider signal that divides the clock and inputs the generated divider signal to the counter, the count value providing a calculation of a frequency error at a calculation timing specified by the control signal. |
| 申请公布号 |
US2016173110(A1) |
申请公布日期 |
2016.06.16 |
| 申请号 |
US201615052267 |
申请日期 |
2016.02.24 |
| 申请人 |
Renesas Electronics Corporation |
发明人 |
Yasukawa Tomoki |
| 分类号 |
H03L7/181;H03K3/03 |
主分类号 |
H03L7/181 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A frequency error calculator, comprising:
a first logic circuit that receives a control signal and a clock; a second logic circuit that receives the control signal and a reference signal; a divider circuit that receives a logical product value of the control signal and the clock from the first logic circuit; and a counter that receives the logical product value of both the control signal and a reference signal, wherein the divider circuit generates a divider signal that divides the clock and inputs the generated divider signal to the counter, the count value providing a calculation of a frequency error at a calculation timing specified by the control signal. |
| 地址 |
Tokyo JP |
